[HW] Design Verification Engineer

[딥엑스] [HW] Design Verification Engineer

[모집기간]

09월 08일 ~ 09월 14일

[담당업무]

-Digital Circuit Design & Verification: Develop testbenches and perform simulations using SystemVerilog/UVM

-Verification Planning & Execution: Build verification environments and analyze functional coverage

-RTL Design Review & Debugging: Analyze and fix design issues

-Collaboration & Documentation: Document design specifications and verification results

[자격요건]

-Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or a related field

-Minimum 3 years of experience in digital design and verification

-Experience building verification environments using SystemVerilog and UVM

-Experience in ASIC/FPGA design and verification

-Proficiency with simulation tools (e.g., ModelSim, VCS, etc.)

[우대사항]

-Experience in AI semiconductor or NPU design and verification

-Proficiency in scripting languages (Python, Perl, TCL, etc.)

[채용공고]